1. Field of the Invention
The present invention relates to a vertically-structured GaN-based light emitting diode and a method of manufacturing the same, and more specifically, to a vertically-structured GaN-based light emitting diode, in which uniform patterns are formed on the upper surface of an n-type GaN layer by utilizing an epitaxial lateral over-growth (ELOG) process so as to increase the external emission efficiency of photon, and a method of manufacturing the same.
2. Description of the Related Art
In general, a GaN-based light emitting diode is grown on a sapphire substrate. However, the sapphire substrate is solid and nonconductive and has low heat conductivity. Therefore, there is a limitation for reducing the size of a GaN-based light emitting diode so as to reduce a manufacturing cost or improving light output and characteristics of chips. Particularly, since a high current must be applied for high output of a light emitting diode, it is important to deal with the heat emission of the light emitting diode. In order to solve the problems, a vertically-structured GaN-based light emitting diode has been proposed, in which a laser lift-off (LLO) technique is used.
In such a vertically-structured GaN-based light emitting diode according to the related art, however, the external quantum efficiency decreases, the external quantum efficiency meaning the ratio of the number of photons emitted outside a light emitting diode to the number of photons generated in a active layer.
FIG. 1 is a diagram for explaining such problems in detail. Referring to FIG. 1, such problems will be described as follows. In order that the photons generated in the active layer pass through a GaN layer having a larger refractive index N1 than a refractive index N2 of the air so as to escape into the air, the incident angle θ1 of the photons incident on the air from the GaN layer should be less than a critical θc.
In this case, the critical angle θc when an escape angle θ2 where the photons escape into the air is 90° is defined by θc=sin−1 (N2/N1). When light is transmitted into the air, whose refractive index is 1, from the GaN layer, the critical angle becomes about 23.6°.
If the incident angle θ1 is more than or equal to the critical angle θc, the photons are totally reflected in the interface between the GaN layer and the air so as to be trapped inside the light emitting diode. As a result, the external quantum efficiency decreases.
In order to prevent the decrease in external quantum efficiency, US Patent Application Publication No. 20030222263 has disclosed a technique in which a patterned array of hemispherical structures is formed on the surface of an n-type GaN layer so that the incident angle θ1 of the photons incident on the air from the GaN layer becomes less than the critical angle θc.
Now, a method of manufacturing the vertically-structured GaN-based light emitting diode disclosed in US Patent Application Publication No. 20030222263 will be described.
FIGS. 2A to 2C are cross-sectional process views showing the vertically-structured GaN-based light emitting diode disclosed in US Patent Application Publication No. 20030222263. FIGS. 3A to 3C are enlarged cross-sectional process views illustrating the vertically-structured GaN-based light emitting diode. FIG. 4 is a cross-sectional view illustrating the vertically-structured GaN-based light emitting diode.
As shown in FIG. 2A, a light emitting diode structure 16 containing GaN and a p-type electrode 18 are formed on a sapphire substrate 24, and a first Pd layer 26 and an In layer 28 are then formed on the p-type electrode 18. Further, on the lower surface of a Si substrate 20, a second Pd layer 30 is formed.
As shown in FIG. 2B, the Si substrate 20 on which the second Pd layer 30 is formed is bonded onto the p-type electrode 18 on which the first Pd layer 26 and the In layer 28 are formed.
As shown in FIG. 2C, the sapphire substrate 24 is removed through an LLO process.
As shown in FIG. 3A, photoresist patterns 32 are formed on a predetermined portion of the surface (specifically, the surface of an n-type GaN layer) of the exposed light emitting diode structure 16, after the sapphire substrate 24 is removed.
As shown in FIG. 3B, the photoresist patterns 32 are formed in a hemispherical shape through a re-flow process.
As shown in FIG. 3C, the surface of the light emitting diode structure 16 is etched through an anisotropic etching method, so that the surface of the light emitting diode structure 16 is patterned in a hemispherical shape.
Finally, when the n-type electrode 34 is formed on the light emitting diode structure 16, the light emitting diode in which the surface of the light emitting diode structure 16 is patterned is completely manufactured as shown in FIG. 4.
However, in the light emitting diode manufactured according to the method of manufacturing the vertically-structured GaN-based light emitting diode disclosed in US Patent Application Publication No. 20030222263, when the light emitting diode structure 16 is grown on the sapphire substrate 24, threading dislocation occurs in the light emitting diode structure 16, due to a difference in the lattice constant and thermal expansion coefficient between the sapphire substrate 24 and the light emitting diode structure 16. The threading dislocation can be the cause of a defective light emitting diode.
Further, when the light emitting diode structure 16 with a thickness of less than 10 μm (in the case of ThinGaN) is handled, there are difficulties in an operation of patterning the photoresist and the following processes, even though a sub-support is used. Accordingly, the yield becomes very low.
In addition, since the patterns formed on the surface of the light emitting diode structure 16 are convex patterns with a hemispherical shape, the external emission path of the photons generated in the active layer is lengthened.